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Earlier in this series, we touched on one problem that can arise when sampling an analog signal, namely the problem of aliasing. There are three other issues with signal sampling to which we now turn our attention: digitization effects, finite register length effects, and oversampling. So far, weve assumed that all of the signals were measuring are continuous analog values; i.e., our measurements are completely accurate. Even in the cases in which we have noise, the underlying assumption is that the measurement itself, for example the noisy sensor output voltage, is known precisely.

We’re all familiar with the general idea of a filter: it removes something that we don’t want from something we do want. Coffee filters that pass the liquid coffee but retain the grounds or air filters that pass clean air but trap the dust and other pollutants are two common examples of mechanical filters in everyday life. That same concept can be applied to noisy electrical signals to pass through the “true” signal of interest while blocking the undesirable noise signal. Looking at Figure 2.5c below, imagine for a moment that the signal of interest is in the lower-frequency region and that the noise signal is in the higher-frequency region. Ideally, we’d like to be able to get rid of that high-frequency noise, leaving just the signal component that we want.

High Level Synthesis Architectural Optimization Basics In part 1 of this article we introduced basic filter bank theory and used the Synplify DSP High Level Synthesis (HLS) tool to implement an example filter bank into three alternative architectures. In part 2 we dive deeper into these three architectures to better understand how these filters work. We will also examine the HLS optimizations we applied and the resulting benefits. Example Filter Bank Review Before we proceed, let's quickly review our filter bank example. Our example, shown in Figure 1, is a size 16 DFT filter bank. The color scheme shows the sample rate change where a 16 MHz input sample rate (red) has been chosen and the output sample rate is downsampled by 16 (green).

With the consumer demand for richer content and its resultant , increasing high data bandwidth continuing to drive communications systems, coding for error control has become extraordinarily important. One way to improve the bit error rate (BER), while maintaining high data reliability, is to use an error correction technique like the Viterbi algorithm. Originally conceived by Andrew Viterbi as an error-correction scheme for noisy digital communication, the Viterbi algorithm provides an efficient method for forward error correction (FEC) that improves channel reliability. Today, it is used in many digital communications systems in applications as diverse as CDMA and GSM digital cellular, dial-up modems, satellite, deep-space communications and 802.11 wireless LANs. It is also commonly used in speech recognition, keyword spotting and computational linguistics.

The ARM Cortex™-M4 processor is the latest embedded processor by ARM specifically developed to address digital signal control markets that demand an efficient, easy-to-use blend of control and signal processing capabilities. The combination of high-efficiency signal processing functionality with the low-power, low cost and ease-of-use benefits of the Cortex-M family of processors is designed to satisfy the emerging category of flexible solutions specifically targeting the motor control, automotive, power management, embedded audio and industrial automation markets. The Cortex-M4 processor features extended single-cycle multiply-accumulate (MAC) instructions, optimized SIMD arithmetic, saturating arithmetic instructions and an optional single precision Floating Point Unit (FPU). These features build upon the innovative technology that characterizes the ARM Cortex-M series processors…

Not so long ago, artists routinely made their own paints using all sorts of odd ingredients: clay, linseed oil, ground-up insects—whatever worked. It was a crude and rather ad hoc process, but the results were used to create some of the greatest paintings in the world. Today I and other scientists are developing our own special paints. We’re not trying to compete with Vermeer or Gauguin, though. We hope to create masterpieces of a more technical nature: optoelectronic components that will make for better photovoltaic cells, imaging sensors, and optical communications equipment. And we’re not mixing and matching ingredients quite so haphazardly. Instead, we’re using our blossoming understanding of the world of nanomaterials to design the constituents of our paints at the molecular level.

French service robotics company Robosoft has introduced a robot called Kompaï designed to assist elderly and disabled people and others who need special care. The mobile robot talks, understands speech, and can navigate autonomously. It reminds people of meetings, keeps track of shopping lists, plays music, and works as a videoconference system for users to talk with their doctors, for example. The video below is pretty awesome. It shows a senior at Broca Hospital, in Paris, interacting with the robot after receiving only a few minutes of training. The man asks the robot about the time, date, and whether he has any appointments that day; Kompaï gives answers in a computerized voice.

In a recent video, Willow Garage researcher Eitan Marder-Eppstein describes the open-source navigation stack they've released as version 1.0. The code, available at http://ros.org/wiki/navigation, was designed to be flexible and cross-platform, he says, and could be used in anything from a small iRobot Create-based bot to a large multi-sensor robot like Willow's own PR2 (which Spectrum has covered in detail here and here).

When considering the resolution required for an A/D converter (ADC) integrated in a microcontroller (MCU), embedded systems designers must balance cost and performance. Higher ADC resolution implies higher-cost MCUs, but in some cases you can use other features in the MCU to enhance the ADC performance via software. That approach lets you achieve higher resolution using an inexpensive integrated ADC. Here's how to use of oversampling to achieve extra bits of resolution for an ADC integrated in an MCU.

LED luminaires require precise power and heat management because LEDs convert most of the electrical energy they receive into heat rather than light. Without adequate thermal management, this heat can degrade the LED's life span and affect color output. Also, LEDs can fail short because they are silicon devices, so they may require fail-safe backup in the form of overcurrent protection. Resettable PPTC (polymeric-positive-temperature-coefficient) circuit-protection devices have demonstrated their effectiveness in a variety of LED-lighting applications. Like traditional fuses, they limit current after they exceed specified limits. However, unlike fuses, PPTC devices can reset after the fault clears and the power cycles.

Avnet Electronics Marketing and Xilinx Inc. said they have concluded their five-month, 37-city global X-fest technical seminar series. According to the companies, the free one-day training sessions offered practical, how-to system level design instruction featuring the Spartan-6 and Virtex-6 FPGA families from Xilinx, as well as key enabling technologies from suppliers including Cypress Semiconductor, Intel, Maxim Integrated Products, National Semiconductor, NXP, Texas Instruments and Tyco Electronics. Replays of the events are available online.

We've collected the most recent how-to and technical articles from Embedded.com on multithreading, multicores, multiprocessor-on-chip (MPoc), and multiprocessor system designs. We're constantly updating our lists of articles and industry links. Keep checking back to see what's new.

ON Semiconductor has expanded its multiplexer product line with devices that are designed to function at high input rates/clock frequencies. The NB6VQ572M, NB6LQ572, NB7L572, NB6L572M, NB7LQ572, NB6LQ572M, NB7VQ58M and NB7V58M mux/fanout devices are targeted at SONET, Gigabit Ethernet, Fiber Channel, backplane and other clock/data distribution applications. The NB6VQ572M and NB6LQ572M differential 4:1 clock/data input multiplexers with 1:2 current mode logic (CML) clock/data fanout buffers operate at up to 6 GHz/8 Gbps from a 1.8 V, 2.5 V or 3.3 V power supply. The new devices have a data dependent jitter of <10 ps and random clock jitter of less than 0.8 ps RMS.

Understand an accelerator's particle-beam measurement and control challenge, and how engineers met it with leading-edge digitizing systems and associated techniques

A Product How-To on building a unified control environment using architectures such as TI’s Stellaris ARM Cortex-M3-based MCUs or Cortex-A8-based Sitara AM35x MPUs.

Synopsys, Inc., has unveiled the DesignWare Ethernet Quality-of-Service (QoS) Controller IP which implements the new IEEE specifications for audio video bridging (AVB) features. The DesignWare Ethernet IP solution supports the new IEEE 802.1AS and 802.1-Qav version D6.0 specifications. These specifications enable efficient networking of streaming audio video (AV) applications through IEEE 802.1 networks found in consumer electronics, automotive AV and professional sound system products. Synopsys' DesignWare Ethernet QoS Controller, which supports 10/100/1G data transfer speeds, allows designers to develop system-on-chips (SoCs) that deliver time-synchronized, low-latency audio and video over Ethernet networks with exceptional quality-of-service while retaining compatibility with legacy networks.

Length-match your traces to within 100 mils. Or is it 10 mils? Or should you go down to 1 mil? Should you include the lengths of the vias? How about the lengths of resistors? Understanding the origin of length-matching requirements, coupled with some rudimentary signal integrity analysis, can help answer these questions.   Determining length requirements requires an understanding of flight time, electrical length vs. physical length, loading and signal quality. Those elements are vital in determining what the length really needs to be, as well as in determining the allowable trade-offs to meet system timing goals.